FPGA Developer

Job Title: FPGA Developer
Contract Type: Permanent
Location: Singapore, Singapore
Salary: Negotiable
Reference: 193536_1553494804
Contact Name: Neha Sharma
Contact Email:
Job Published: March 25, 2019 14:20

Job Description

FPGA Developer

  • Global Financial company
  • Growth opportunities
  • Competitive salary and performance-based bonuses


  • At least 5 to 10 years of experience with FPGA development
  • Vhdl, verilog or systemverilog programming
  • Asic development via vhdl or verilog experience will qualify for the position
  • C or C++ programming
  • Experience with Ethernet protocols, pci-e, and/or switching and routing in network equipment.
  • Parsing, traffic shaping.
  • Verification skills using cocotb, formal verification and UVM recommended
  • Experience in Linux environment is a plus
  • Experience with intel x86 is a plus
  • Writing kernel drivers for fpga a plus
  • A bachelor's degree in electrical engineering, or equivalent professional experience
  • Expert-level knowledge of Altera products, development tools, and related simulators
  • A strong understanding of network PHY interfacing
  • Experience using Logic Scope for wire-to-wire analysis and performance measurement
  • Integration experience with independent third-party cores
  • Able to design and develop signal processing cores from system and architectural requirements
  • Ability to document design and interface specifications
  • A strong background in mathematics (preferred)
  • Experience with Altera Stratix and Bitware Boards (preferred)
  • A demonstrated background in 100Mbps, 1Gbps, and 10Gbps network interfaces (preferred)
  • An understanding of various network hardware techniques, such as store and forward (preferred)
  • Previous work experience at a high-frequency trading firm (preferred)


  • Collaborating with software developers across divisions to architect low-latency connections to financial exchanges around the world
  • Building advanced Ethernet-based communication stacks direct from chip to SFP
  • Integrating network stacks to connect to various financial exchanges
  • Creating custom logic to manage a constant inflow of data, which will need to be parsed, processed, and passed to the user space in the most efficient manner possible
  • Identifying bottlenecks and measuring latency using logic scopes
  • Working closely with software developers to develop an optimal interface between FPGA hardware and user space software

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